TSMC 180 BCD, SESAME uHD for ultra high-density logic design thanks to 6-track cells combined with pulsed latch cells acting as spinner cells (densest alternative to flip-flops).

• Ultra High-Density
• Up to 19% denser after P&R compared to existing 7-Track library
• 6-Tracks logic library for optimal area reduction
• Pulsed latches as Spinner Cells instead of flip-flops: for up to 30% gain in density at cell level
• Up to 63% less power consuming than competition
• Only Metal 1 used in layout
• Ideal for slow to medium speed logic blocks
• With smooth implementation
• Pulse generator insertion automated by a script
• Spinner cell design minimizing hold time violations
• Low dynamic power
• Dual voltage characterization to support a wide operating voltage range from 1.8 V +/-10% to 1.1 V +/-10%
• Reduction of dynamic power consumption by 2.5x when operating at low voltage
• Leakage divided by 2 compared to sponsored offering