Single Port SRAM compiler - TSMC 130 nm BCD Plus - Memory optimized for ultra high density and high speed - compiler range up to 64 k
Key Benefits
- Smart periphery design to reach the highest density
- Memory designed with SVT MOS for periphery and SVT HD PRBC from TSMC for memory core
- Flexible architecture
- To offer several performance trade-offs for any memory size
- Multiple form factors proposed by the generator for a given capacity
- Variable write mask capability
Performances
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Variants
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VT Bit cell
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VT Periphery
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Operating Voltage
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Capacity
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Option mode
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130 BCD Plus
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HD SVT | SVT | Nominal voltage: 1.5V +/-10% Low voltage: |
8kByte | - |