TSMC 40 uLPeF, CLICK, power gating cells to create a ring of switches in order to ease the integration of hard macro and provide automatic control of in-rush current during wake-up.

Key Benefits

  • Make the integration easier thanks to ringstyle
  • Optimization of switch placement or modification is made easier
  • Simplified power grid creation
  • Script for an optimized ring generation with automated insertion of the ring
  • Script for automatic computation of the optimal number and size of switches required for islet construction
  • Make your implementation safe
  • Transition Ramp Cell (TRC) enabling automated limitation of inrush current at wake up
  • TRC controls the in-rush current by design whereas traditional daisy chain method can only be verified with voltage drop analysis after SoC implementation
  • Minimize your wake up time
  • TRC provides both control and acknowledge signals to the power management controller for an easy programmable optimization of wake up time.

Specificities

Variants
VT
Operating Voltage
40 uLP eFlash
HVT Nominal voltage: 1.1V
Low voltage: 0.9V
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