TSMC 65 LP, SESAME BIV, a new thick oxyde based standard cell library for ultra low leakage logic design and/or direct battery connection through the use of a patented flip flop.

• No need for a voltage regulator
• Cells designed with 2.5 V oD thick-oxide transistors to support a wide operating voltage range from 3.3 V +/-10% to 1.2 V +/-10%
• Custom characterization corners down to 1.10 V +/-10% can be provided
• Ideal for always on clock islets (RTC) and always on functional islets (voice recognition?)
• Low dynamic power with ultra-low leakage
• Leakage reduction of 1/350 for a 5,000 gates islet implemented with BIV at 3.3 V, compared to a conventional HVT library operating at 1.2 V
• Support of low voltage retention down to 0.5 V
• Higher density compared to HVT library combined with voltage regulator
• 7X gain in density for a 5,000 gates islet implemented with BIV at 3.3 V, compared to a conventional HVT library operating at 1.2 V
• 10-track cells
• 2.5 V overdriven to 3.3 V transistors
• SoC Integration secured and simplified from 3.3 V to 1.2 V
• Selection of the optimal characterization corners to maintain speed, reliability and consumption at low voltage
• Full set of high-low and low-high level shifters isolated or not