Single Port SRAM compiler - TSMC 130 nm BCD Plus - Memory optimized for ultra high density and high speed - compiler range up to 64 k

Key Benefits

  • Smart periphery design to reach the highest density
  • Memory designed with SVT MOS for periphery and SVT HD PRBC from TSMC for memory core
  • Flexible architecture
  • To offer several performance trade-offs for any memory size
  • Multiple form factors proposed by the generator for a given capacity
  • Variable write mask capability

Performances

Variants
VT Bit cell
VT Periphery
Operating Voltage
Capacity
Option mode
130 BCD Plus
HD SVT SVT Nominal voltage:
1.5V +/-10%

Low voltage:
NAN

8kByte -