Single Port SRAM compiler - TSMC 180 nm G - Memory optimized for ultra low leakage - compiler range up to 256 k

• Ultra low leakage even in generic process
• Thick and Thin patent
• Leakage is divided by a factor of 1 000
• Data retention
• Data retention while switching off the periphery when the memory is inactive
• Wide range of power supply for data retention: from 0.8 V up to 3.6 V
• Functionality from 2 V down to 1.6 V
• More than 22% power savings compared to operating at nominal voltage
• Low power consumption
• Dolphin Integration XAM patented bit-cell
• Optimal Design for Yield
• Design methodology ensuring High-Yield circuits despite Mismatch
• Association with LDO for regulated power supply voltages
• Optional BIST for industrial fabrication test of instances