Single Port SRAM compiler - TSMC 180 nm G - Memory optimized for ultra low power and high density - Dual Voltage - compiler range up to 512 k
Key Benefits
- Reduced die cost
- Up to 20% denser than alternative solution
- Pushed rule bit cell from foundry
- Ultra low dynamic power
- Low voltage operation down to 0.99 V
- Multi-plane architecture
- Up to 3 times less dynamic power consuming than foundry sponsored solutions
- Optional Byte write mode
- A Dual Voltage variant of this product is also available
- Ultra low leakage
- Data retention mode: only the memory plane and the circuitry for retention would remain powered. Note that this data-retention mode requires 2 VDD power supply lines and one GND.
- Stand by mode
- Easy integration
- Mux factor can be chosen
- Deliverables compatible with Top Metal 4 or Top Metal 5 or +
- Wide flexibility for words and bits per word
- The Dolphin quality
- Mas produced architecture
Performances
Variants
|
VT Bit cell
|
VT Periphery
|
Operating Voltage
|
Capacity
|
Option mode
|
---|---|---|---|---|---|
180 G
|
SVT | SVT | Nominal voltage: 1.8 V +/-10% Low voltage: |
512 bits to 512 kbits | - |