Key Benefits

  • Power reduction features
  • Dual voltage capability
  • Designed to minimize power consumption
  • Decrease of fabrication costs
  • Single metal layer via programmable ROM
  • High Density architecture and bit cell
  • 5% to 30% denser than contenders
  • Ultra low leakage
  • No leakage in memory plane
  • Minimal leakage in memory periphery

Performances

Variants
VT Bit cell
VT Periphery
Operating Voltage
Capacity
Option mode
130 G
- SVT Nominal voltage:
1.2 V +/-10%

Low voltage:
0.9 V +/-10%

1 kbit to 1 Mbit -