Key Benefits

  • Reduce the die cost
  • Via 1 programmable ROM
  • Key patent for high density with only one programming
  • layer
  • Gain in density over alternative ROM
  • Extend the battery life
  • Significant gain in dynamic power consumption compared to alternative ROM
  • no leakage in memory plan and minimal leakage in memory periphery
  • Make the integration easier
  • Depending on memory capacity. A huge number of MUX options can be selected
  • high flexibility for address range
  • Enable right on 1st pass design, the Dolphin integration quality
  • Complete mismatch validation of the memory architecture taking in account local and global dispersion
  • silicon proven through TSMC 9000 quality standard

Performances

Variants
VT Bit cell
VT Periphery
Operating Voltage
Capacity
Option mode
55 HV
N/A LVT Nominal voltage:
1.2 V +/-10%

Low voltage:
NA

1k - 2M -