Metal programmable ROM compiler - TSMC 130 nm LP - Non volatile memory optimized for ultra high density
Key Benefits
- State-of-the-Art proprietary architecture CASSIOPEIA for tROMet
- Micro-wordline scheme for low power consumption
- Patented bit-cell
- featuring ultra-high-density due to the advanced technology of storing 2bits/ cell
- Self-sequenced circuitry for ensuring robustness against process deviations
Performances
Variants
|
VT Bit cell
|
VT Periphery
|
Operating Voltage
|
Capacity
|
Option mode
|
---|---|---|---|---|---|
130 LP
|
- | - | Nominal voltage: 1.5 V +/-10% |
- | - |