LDO linear regulator in TSMC 22ULL to supply logic and analog domains - up to 5.5 V input supply

Key Benefits

  • Low leakage current suitable for deep sleep modes
  • Low quiescent current for higher efficiency at light load
  • High PSRR to supply analog loads
  • Support input supply voltage up to 5.5 V

Key Features

PARAMETERS CONDITION
Minimum value
Typical value
Maximum value
Input Voltage
- 1.8 V 5.5 V
Output Voltage
- 1.8 V 3.3 V
Output current configuration
- - 200 mA -

Applications

  • Cellular IoT
  • GNSS
  • NB-IoT
  • ULP MCU

Key Performances

  • DC output voltage accuracy: 3 %
  • Typical PSRR up to 1 kHz: -45 dB
  • Typical current consumption at no load: 65 µA
  • Total integrated noise from 20 Hz to 20 kHz: 450 µVRMS

Technical information

  • Technology: TSMC 22 uLL
  • Add-ons:
    • OPM-G2-1.8-5.5-2.6.01_TSMC_22_ULL