Low-leakage LDO in TSMC 40 ULP to supply logic and analog domains (up to 5.5V input supply) with programmable output voltage from 0.55 up to 3.3V.

Key Benefits

  • Low leakage current for best consumption in sleep mode
  • High PSRR to supply analog loads
  • Low quiescent
  • Support input supply voltage up to 5.5V (Li-Ion, USB)

Key Features

PARAMETERS CONDITION
Minimum value
Typical value
Maximum value
Input Voltage
- 2.7 V 5.5 V
Output Voltage
- 0.55 V 3.3 V
Output current configuration
- - 100 mA -

Applications

  • Smart Headset
  • TWS Earpods
  • Smart Speaker
  • Voice Assistant
  • Hearing aids
  • Voice-controlled devices
  • Bluetooth
  • NB-IoT
  • ULP MCU
  • WiFi
  • GNSS
  • Cellular IoT

Key Performances

  • Programmable output voltage from 0.55 up to 3.3V

Technical information

  • Technology: TSMC 40 uLP