Linear regulator, low-noise optimized for sensitive analog loads such as CODEC and Reference
nLR-VAIPO-[2.90-3.63]-[2.5].01 SMIC 55 LL
Power Management Platform - SPIDER / LDO
Starring a PSRR of -65 dB at 20 kHz and a low intrinsic noise, combined with a low quiescent current of 110 uA, the nLR-VAIPO helps optimize the power management network for audio handheld applications such as smartphone and tablet.
Small footprint: only 0.12 mm2 (including bandgap reference and POK circuit)
Minimization of the overall system power, through the support of 3 modes of operation: normal, shutdown and bypass
Eases integration in SoC nLR-VAIPO is delivered with behavioral models. These new views enable to build an optimized Power Management Network (PMNet) by verifying mode transitions as well as noise propagation.
Output current configuration
AR - VR
2.90V to 3.63V input voltage range
2.5V output voltage
325mV minimum dropout
110/130 uA quiescent current (no load) depending on the technology.