Key Benefits

  • Available for Free Download and Use
  • Decrease of fabrication costs
  • Up to 50% denser than traditional register file compilers!
  • Ultra low dynamic power
  • Low power architecture even at nominal voltage: Up to 50% less consuming than standard memory compilers available at 90 nm LP
  • Low voltage capability: 30% additional power consumption savings when operating at 1.0 V +/-10%
  • Byte write capability
  • Flexible power routing: power ring or ring-less
  • Low leakage
  • Memory designed with HVt MOS for periphery and HVt bit-cell from foundry for memory core
  • Data retention mode to divide leakage by 5 compared to standard stand by mode
  • The Dolphin quality
  • Complete mismatch validation of the memory architecture taking in account local and global dispersion
  • Architecture designed to enable robust low voltage operation
  • Optional BIST for industrial fabrication test of instances

Performances

Variants
VT Bit cell
VT Periphery
Operating Voltage
Capacity
Option mode
90 uLL
uLL HVT
SVT
Nominal voltage:
1.2 V +/-10%

Low voltage:
1.0 V +/-10%

128 bits to 40 kbits -